Advanced packaging is too expensive and unsuitable for mass market applications, at present, as packaging costs can easily exceed silicon costs. However, it is anticipated that the new solution under development will support a sub 50u pitch initially with planned enhancements to 10u pitch based on test results.
Chiplets represent a multi-billion-dollar market potential, according to Transparency Market Research, and the market is expected to be worth more than $47bn by 2031, representing one of the fastest growing segments of the semiconductor industry at more than 40% CAGR from 2021 to 2031.
This growth was expected to be enabled by the considerable cost reduction and improved yields that Chiplets will enable as compared to traditional system-on-chip (SOC) designs but has, to date, been limited by high packaging and PHY costs to HPC markets.
YorChips’ CEO and founder, Kash Johal, said, “It is imperative that the PHY should be co-designed with the packaging in mind for optimal size, power and latency. We see potential reduction in PHY costs of greater than 90% and power reduction of more than 75% with this breakthrough. We also see a UCIe PHY size of 1.4mm2 migrating to below 0.1mm2 and power below 0.1pj/bit when optimised for short reach connections of sub 1mm.”
“The core technology has already been proven in the MEMS market and eliminates expensive interposers, and we are planning on running test Chiplet packaging in 2025,” said Digitho CEO and founder, Richard Beaudry. “The technology will be tested for homogenous integration and for heterogenous integration of multiple Chiplets of sub-reticle size. We expect to set up production at an OSAT partner in 2026 if successful and eventually expect to add multiple OSAT partners offshore as market develops.”
Many different markets such as mil/space, industrial, automotive and edge AI applications are size, weight and power sensitive, so by lowering the Chiplet development, power and packaging costs it will be possible to accelerate the development of future FPGA and eFPGA Chiplet projects.
Chiplets with Digitho technology are expected to be available in early 2026.
